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How can you describe the differences between always @* and always_comb in SystemVerilog?
When discussing the differences between always @* and always_comb in SystemVerilog, it is important to note their distinct functionalities. The always @* construct is sensitive to all procedural assignments within the block, triggering whenever there is a change in any of the signals within its scope. On the other hand, always_comb is specifically designed to represent combinational logic, ensuring that the logic inside it is executed in a deterministic and continuous manner without any feedback loops.
Focus Keyword: SystemVerilog
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